The invention relates to contactless non-destructive testing of electronic materials and devices.
In the process of fabrication of electronic devices, there is a need for non-destructive, contactless testing. This allows identification of technological defects in early production stages in order to either eliminate defective devices from further production, or to repair them, thereby increasing the production yield. Semiconductor and flat panel display (FPD) technologies are typical examples in which these concerns are important. In fabrication of semiconductor devices, semiconducting wafers are processed by lithography and doped by various atoms using numerous techniques, for example, ion implantation, in order to form regions of different carrier concentration buried in a wafer. In addition, the regions of different conductivity can be formed by controlled deposition of additional layers on the surface of a wafer. These layers are deposited by various deposition techniques including molecular beam epitaxy (MBE), chemical vapor deposition (CVD), thermal or electron beam evaporation, sputtering, and others. The processing steps that create regions of varying carrier concentration or mobility are performed at different stages of the fabrication process, and precise processing conditions, influenced by many factors, must be attained in order to obtain structures of required properties. These regions are utilized for fabrication of various electronic devices integrated on the wafer.
To increase the production yield and to minimize cost, a fraction of wafers is tested for deficiencies after each processing step, or set of steps, so that further processing of wafers that do not satisfy the required criteria is avoided. Typically, the testing is done by examining the wafers using optical or electron microscopy, or other optical methods. These tests, even though powerful, reveal predominantly the surface characteristics and, in general, can not reveal physical properties within the wafer. Other, usually destructive, tests are employed on a statistically selected number of devices or test structures present on the wafer. These tests can be time consuming and costly, and furthermore, frequently result in destruction of tested devices. Additionally, microelectronic devices are tested after their completion, but at this stage if a device does not satisfy the predetermined criteria due to a processing error, a whole batch of processed devices could be unusable.
In the FPD fabrication process, a set of thin, optically transparent conducting lines is deposited on insulating substrates (e.g. glass). Then, a liquid crystal material is placed between two such substrates forming an FPD. In this process, a number of defects (e.g., line discontinuities, interline short circuits, substrate surface inhomogeneities, line inhomogeneities, micro cracks) is inadvertently formed. It is extremely desirable to locate and repair these defects; thus there is a demand for a fast, nondestructive testing technique which can be applied to every FPD component after each technological step.
In summary, there is a need for contactless inspection of materials and devices at different stages of their fabrication. If the inspection results in early detection of structural defects or deviations from required characteristics, the production yield will significantly increase. Additionally, there is a need for a contactless inspection method which can examine uniformity and structural integrity of semiconducting or conducting layers of heterostructures created by MBE, CVD, evaporation, sputtering, plasma spraying, and other deposition techniques.